Invention Grant
- Patent Title: Semiconductor device
- Patent Title (中): 半导体器件
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Application No.: US12149567Application Date: 2008-05-05
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Publication No.: US07667244B2Publication Date: 2010-02-23
- Inventor: Tadashi Narita
- Applicant: Tadashi Narita
- Applicant Address: JP Tokyo
- Assignee: Oki Semiconductor Co., Ltd.
- Current Assignee: Oki Semiconductor Co., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Rabin & Berdo, PC
- Priority: JP2007-149167 20070605
- Main IPC: H01L27/10
- IPC: H01L27/10

Abstract:
On a semiconductor substrate, a gate electrode is disposed obliquely across the boundary between an N-type region and a P-type region, and thereby an effective gate width of a region, in which the boundary between the N-type region and the P-type region intersects with the gate electrode, is wider than that of the gate electrode. Accordingly, the occurrence of abnormal resistance, which makes it difficult for an electric current to flow in the gate electrode on the boundary between the N-type region and the P-type region, may be effectively suppressed without physically widening the gate width. Moreover, widening of the gate width of the gate electrode may be eliminated in suppressing the occurrence of abnormal resistance and it is not necessary to enlarge the areas of the N-type region and the P-type region, thereby inevitable enlargement of the overall size of the semiconductor device being avoided.
Public/Granted literature
- US20080303100A1 Semiconductor device Public/Granted day:2008-12-11
Information query
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