Invention Grant
- Patent Title: Stacked semiconductor module
- Patent Title (中): 堆叠式半导体模块
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Application No.: US11491033Application Date: 2006-07-24
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Publication No.: US07667313B2Publication Date: 2010-02-23
- Inventor: Takeshi Kawabata , Toshiyuki Fukuda
- Applicant: Takeshi Kawabata , Toshiyuki Fukuda
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2005-313186 20051027
- Main IPC: H01L23/02
- IPC: H01L23/02

Abstract:
A stacked semiconductor module is made by stacking a second semiconductor device having a second semiconductor chip mounted to the top surface of a second semiconductor substrate above the top surface of a first semiconductor device having a first semiconductor chip mounted to a first semiconductor substrate. The top surface of the first semiconductor substrate is provided with a first connection terminal and the bottom surface of the first semiconductor substrate is provided with an external connection terminal. A region of the bottom surface of the second semiconductor substrate lying opposite to the second semiconductor chip is provided with a second connection terminal. A conductive connecting member connects the first connection terminal to the second connection terminal.
Public/Granted literature
- US20070096334A1 Stacked semiconductor module Public/Granted day:2007-05-03
Information query
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