Invention Grant
- Patent Title: Digital duty cycle corrector
- Patent Title (中): 数字占空比校正器
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Application No.: US10988454Application Date: 2004-11-12
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Publication No.: US07667513B2Publication Date: 2010-02-23
- Inventor: Gary D. Carpenter , Alan J. Drake , Fadi H. Gebara , Chandler T. McDowell , Hung C. Ngo
- Applicant: Gary D. Carpenter , Alan J. Drake , Fadi H. Gebara , Chandler T. McDowell , Hung C. Ngo
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Garg Law Firm, PLLC
- Agent Rakesh Garg; Libby Z. Handelsman
- Main IPC: H03K3/017
- IPC: H03K3/017

Abstract:
A circuit and method of correcting the duty cycle of digital signals is disclosed. The duty cycle of an input digital signal is measured and compared to a desired duty cycle. The leading edge of the input digital signal is passed to an output. The circuit and method adjust the falling edges at the output to achieve the desired duty cycle. The falling edges occur in response to rising edges of a delayed version of the input digital signal.
Public/Granted literature
- US20060103441A1 Digital duty cycle corrector Public/Granted day:2006-05-18
Information query
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