Invention Grant
- Patent Title: Delay circuit and electronic device including delay circuit
- Patent Title (中): 延迟电路和电子设备包括延迟电路
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Application No.: US11958859Application Date: 2007-12-18
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Publication No.: US07667514B2Publication Date: 2010-02-23
- Inventor: Takema Yamazaki , Masayuki Ikeda
- Applicant: Takema Yamazaki , Masayuki Ikeda
- Applicant Address: JP
- Assignee: Seiko Epson Corporation
- Current Assignee: Seiko Epson Corporation
- Current Assignee Address: JP
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: JP2007-002042 20070110; JP2007-259484 20071003
- Main IPC: H03H11/26
- IPC: H03H11/26

Abstract:
A delay circuit includes: a current control circuit which has n (n is 1 or larger natural number) control pins and a first output line, and is capable of controlling current outputted from the first output line in response to n control signals inputted to the corresponding n control pins; a current mirror circuit connected with the first output line to produce current mirror current from the current and output the current mirror current from a second output line; a first active element having a gate pin and an input pin, the gate pin is connected with the second output line, and the input pin is connected with the first voltage line; a second active element having a gate pin and an input pin, the gate pin is connected with the first output line, and the input pin is connected with the second voltage line; and an inverter circuit having third and fourth active elements connected in series between an output pin of the first active element and an output pin of the second active element.
Public/Granted literature
- US20080164923A1 DELAY CIRCUIT AND ELECTRONIC DEVICE INCLUDING DELAY CIRCUIT Public/Granted day:2008-07-10
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