Invention Grant
US07668008B2 1-transistor type DRAM cell, a DRAM device and manufacturing method therefore, driving circuit for DRAM, and driving method therefor 失效
1晶体管型DRAM单元,DRAM装置及其制造方法,DRAM的驱动电路及其驱动方法

  • Patent Title: 1-transistor type DRAM cell, a DRAM device and manufacturing method therefore, driving circuit for DRAM, and driving method therefor
  • Patent Title (中): 1晶体管型DRAM单元,DRAM装置及其制造方法,DRAM的驱动电路及其驱动方法
  • Application No.: US11781421
    Application Date: 2007-07-23
  • Publication No.: US07668008B2
    Publication Date: 2010-02-23
  • Inventor: Hee Bok Kang
  • Applicant: Hee Bok Kang
  • Applicant Address: KR Kyoungki-do
  • Assignee: Hynix Semiconductor Inc.
  • Current Assignee: Hynix Semiconductor Inc.
  • Current Assignee Address: KR Kyoungki-do
  • Agency: Ladas & Parry LLP
  • Priority: KR10-2006-0068749 20060721; KR10-2006-0075404 20060809; KR10-2006-0075411 20060809; KR10-2006-0075412 20060809
  • Main IPC: G11C11/34
  • IPC: G11C11/34
1-transistor type DRAM cell, a DRAM device and manufacturing method therefore, driving circuit for DRAM, and driving method therefor
Abstract:
The present invention relates to an 1-transistor DRAM cell, a DRAM device and a manufacturing method therefor, a driving circuit for a DRAM, a driving method therefore, and a driving method for an 1-transistor DRAM, and a double-gate type 1-transistor DRAM. The present invention comprises a data hold process biasing a word line at a negative voltage level and biasing a sensing line and a bit line at a first constant voltage level; a data purging process resetting data by biasing the word line and the bottom word line at a second constant voltage level and biasing the sensing line and the bit line at the first constant voltage level; and a data write process biasing the word line and the bottom word line at the second constant voltage level and supplying a write data to the bit line.
Information query
Patent Agency Ranking
0/0