Invention Grant
US07668524B2 Clock deskewing method, apparatus, and system 有权
时钟歪斜方式,装置和系统

Clock deskewing method, apparatus, and system
Abstract:
An integrated circuit includes clock deskew circuitry. The deskew circuitry includes a loop circuit to align an input clock signal with an output clock signal, and also aligns transmitted data with the output clock signal.
Public/Granted literature
Information query
Patent Agency Ranking
0/0