In a semiconductor integrated circuit, a counter counts the number of high-speed clock signals that have been generated in a predetermined number of clock cycles of a low-speed clock signal. In synchronization with the low-speed clock signal, the semiconductor integrated circuit compares the counter value and a predetermined value, and judges whether the frequency of the high-speed clock signal has reaches a predetermined frequency. Since variations in the frequency become smaller as the oscillation of a high-speed oscillator stabilizes, the semiconductor integrated circuit detects that the oscillation is stable when the semiconductor integrated circuit has judged affirmatively a plurality of times.