Invention Grant
- Patent Title: Method of and circuit for buffering data
- Patent Title (中): 缓冲数据的方法和电路
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Application No.: US11527802Application Date: 2006-09-27
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Publication No.: US07669017B1Publication Date: 2010-02-23
- Inventor: Hemang Maheshkumar Parekh , Hai-Jo Tarn , Gabor Szedo , Vanessa Yu-Mei Chou , Jeffrey Allan Graham , Elizabeth R. Cowie
- Applicant: Hemang Maheshkumar Parekh , Hai-Jo Tarn , Gabor Szedo , Vanessa Yu-Mei Chou , Jeffrey Allan Graham , Elizabeth R. Cowie
- Applicant Address: US CA San Jose
- Assignee: Xilinx, Inc.
- Current Assignee: Xilinx, Inc.
- Current Assignee Address: US CA San Jose
- Agent John J. King
- Main IPC: G06F12/00
- IPC: G06F12/00

Abstract:
A method of buffering data in a circuit processing data in both a natural address order and a modified address order is described. The method comprises the steps of storing a first block of data according to a first addressing order of a natural address order or a modified address order; reading the first block of data stored in a buffer according to the other addressing order of the natural address order and the modified address order; and simultaneously writing a second block of data to the buffer in the other addressing order while reading the first block of data stored in a buffer according to the other addressing order.
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