Invention Grant
US07669037B1 Method and apparatus for communication between a processor and hardware blocks in a programmable logic device
有权
处理器与可编程逻辑器件中的硬件块之间的通信的方法和装置
- Patent Title: Method and apparatus for communication between a processor and hardware blocks in a programmable logic device
- Patent Title (中): 处理器与可编程逻辑器件中的硬件块之间的通信的方法和装置
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Application No.: US11076797Application Date: 2005-03-10
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Publication No.: US07669037B1Publication Date: 2010-02-23
- Inventor: Paul R. Schumacher , Kornelis Antonius Vissers
- Applicant: Paul R. Schumacher , Kornelis Antonius Vissers
- Applicant Address: US CA San Jose
- Assignee: Xilinx, Inc.
- Current Assignee: Xilinx, Inc.
- Current Assignee Address: US CA San Jose
- Agent Robert M. Brush; Lois D. Cartier
- Main IPC: G06F15/76
- IPC: G06F15/76
Abstract:
Method and apparatus for communication between hardware blocks and a processor in a programmable logic device is described. A shared memory is provided along with a memory controller for controlling access to the shared memory. An interface is configured to receive auxiliary instructions from the processor, select the hardware blocks for the requested tasks in response to the auxiliary instructions, notify the hardware blocks of those tasks, and arbitrate access to the memory controller among the hardware blocks.
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