Invention Grant
US07670756B2 Pattern forming method, semiconductor device manufacturing method and exposure mask set
有权
图案形成方法,半导体器件制造方法和曝光掩模组
- Patent Title: Pattern forming method, semiconductor device manufacturing method and exposure mask set
- Patent Title (中): 图案形成方法,半导体器件制造方法和曝光掩模组
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Application No.: US12271567Application Date: 2008-11-14
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Publication No.: US07670756B2Publication Date: 2010-03-02
- Inventor: Takeo Ishibashi , Takayuki Saito , Maya Itoh , Shuji Nakao
- Applicant: Takeo Ishibashi , Takayuki Saito , Maya Itoh , Shuji Nakao
- Applicant Address: JP Tokyo
- Assignee: Renesas Technology Corp.
- Current Assignee: Renesas Technology Corp.
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2004-312076 20041027
- Main IPC: G03F7/00
- IPC: G03F7/00

Abstract:
First, a first exposure process is performed using dipole illumination with only a grating-pattern forming region as a substantial object to be exposed. Next, a second exposure process is performed with only a standard-pattern forming region as a substantial object to be exposed. A development process is then performed to obtain a resist pattern. A mask for the first exposure process is such that a light blocking pattern is formed on the whole surface of a standard-pattern mask part corresponding to the standard-pattern forming region. A mask for the second exposure is such that a light blocking pattern is formed on the whole surface of a grating-pattern mask part corresponding to the grating-pattern forming region.
Public/Granted literature
- US20090075187A1 PATTERN FORMING METHOD, SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND EXPOSURE MASK SET Public/Granted day:2009-03-19
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