Invention Grant
- Patent Title: Structure and method for fabrication JFET in CMOS
- Patent Title (中): CMOS中制造JFET的结构和方法
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Application No.: US12132638Application Date: 2008-06-04
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Publication No.: US07670889B2Publication Date: 2010-03-02
- Inventor: John J. Pekarik , Richard A. Phelps , Robert M. Rassel , Yun Shi
- Applicant: John J. Pekarik , Richard A. Phelps , Robert M. Rassel , Yun Shi
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Greenblum & Bernstein P.L.C.
- Agent Anthony J. Canale
- Main IPC: H01L21/337
- IPC: H01L21/337 ; H01L21/84
Abstract:
A design structure, and more particularly, to a design structure for manufacturing a JFET in SOI, a JFET and methods of manufacturing the JFET are provided. The JFET includes a gate poly formed directly on an SOI layer and a gate oxide layer interposed between outer edges of the gate poly and the SOI layer.
Public/Granted literature
- US20090302355A1 STRUCTURE, STRUCTURE AND METHOD FOR FABRICATION JFET IN CMOS Public/Granted day:2009-12-10
Information query
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