Invention Grant
- Patent Title: Process of forming an electronic device including a semiconductor layer and another layer adjacent to an opening within the semiconductor layer
- Patent Title (中): 形成包括半导体层和邻近半导体层内的开口的另一层的电子器件的工艺
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Application No.: US11409633Application Date: 2006-04-24
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Publication No.: US07670895B2Publication Date: 2010-03-02
- Inventor: Toni D. Van Gompel , Peter J. Beckage , Mohamad M. Jahanbani , Michael D. Turner
- Applicant: Toni D. Van Gompel , Peter J. Beckage , Mohamad M. Jahanbani , Michael D. Turner
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc
- Current Assignee: Freescale Semiconductor, Inc
- Current Assignee Address: US TX Austin
- Main IPC: H01L21/8238
- IPC: H01L21/8238
Abstract:
A process of forming an electronic device can include patterning a semiconductor layer to define an opening. After patterning the semiconductor layer, the opening can have a bottom, and the semiconductor layer can have a sidewall and a surface. The surface is spaced apart from the bottom of the opening. The sidewall can extend from the surface towards the bottom of the opening. The process can also include forming a layer over the semiconductor layer and within the opening, and removing a part of the first layer from within the opening. After removing the part of the layer, a remaining portion of the layer may lie within the opening and adjacent to the bottom and the sidewall, and the remaining portion of the layer may be spaced apart from the surface. In another aspect, the electronic device can include a field isolation region including the first layer.
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