Invention Grant
US07670926B2 Method for forming shallow trench isolation utilizing two filling oxide layers
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使用两个填充氧化物层形成浅沟槽隔离的方法
- Patent Title: Method for forming shallow trench isolation utilizing two filling oxide layers
- Patent Title (中): 使用两个填充氧化物层形成浅沟槽隔离的方法
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Application No.: US11319696Application Date: 2005-12-29
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Publication No.: US07670926B2Publication Date: 2010-03-02
- Inventor: Wan Shick Kim
- Applicant: Wan Shick Kim
- Applicant Address: KR Seoul
- Assignee: Dongbu Electronics Co., Ltd.
- Current Assignee: Dongbu Electronics Co., Ltd.
- Current Assignee Address: KR Seoul
- Agency: Lowe Hauptman Ham & Berner LLP
- Priority: KR10-2004-0117500 20041230
- Main IPC: H01L21/762
- IPC: H01L21/762 ; H01L29/00
Abstract:
A method for forming shallow trench isolation in a semiconductor device. The method includes forming a trench in a predetermined depth on a semiconductor substrate, filling the trench with a first filing oxide, injecting an impurity into a portion of the first filling oxide inside the trench, removing the portion of the first filling oxide by wet etching, and filling the trench with a second filling oxide.
Public/Granted literature
- US20060145287A1 Method for forming shallow trench isolation in semiconductor device Public/Granted day:2006-07-06
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