Invention Grant
- Patent Title: Plating method, semiconductor device fabrication method and circuit board fabrication method
- Patent Title (中): 电镀方法,半导体器件制造方法和电路板制造方法
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Application No.: US11250399Application Date: 2005-10-17
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Publication No.: US07670940B2Publication Date: 2010-03-02
- Inventor: Masataka Mizukoshi , Kanae Nakagawa , Takeshi Shioga , Kazuaki Kurihara , John David Baniecki
- Applicant: Masataka Mizukoshi , Kanae Nakagawa , Takeshi Shioga , Kazuaki Kurihara , John David Baniecki
- Applicant Address: JP Kawasaki
- Assignee: Fujitsu Limited
- Current Assignee: Fujitsu Limited
- Current Assignee Address: JP Kawasaki
- Agency: Westerman, Hattori, Daniels & Adrian, LLP
- Priority: JP2004-303345 20041018; JP2005-235229 20050815
- Main IPC: H01L21/76
- IPC: H01L21/76

Abstract:
The plating method comprises the step of forming a resin layer 10 over a substrate 16; the step of cutting the surface part of the resin layer 10 with a cutting tool 12; the step of forming a seed layer 36 on the resin layer 10 by electroless plating; and the step of forming a plating film 44 on the seed layer 36 by electroplating. Suitable roughness can be give to the surface of the resin layer 10, whereby the adhesion between the seed layer 36 and the resin layer 10 can be sufficiently ensured. Excessively deep pores are not formed in the surface of the resin layer 10, as are by desmearing treatment, whereby a micronized pattern of a photoresist film 40 can be formed on the resin layer 10. Thus, interconnections 44, etc. can be formed over the resin layer 10 at a narrow pitch with high reliability ensured.
Public/Granted literature
- US20060084253A1 Plating method, semiconductor device fabrication method and circuit board fabrication method Public/Granted day:2006-04-20
Information query
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