Invention Grant
US07670945B2 In situ deposition of a low κ dielectric layer, barrier layer, etch stop, and anti-reflective coating for damascene application
有权
用于大马士革应用的低&K介电层,阻挡层,蚀刻停止和抗反射涂层的原位沉积
- Patent Title: In situ deposition of a low κ dielectric layer, barrier layer, etch stop, and anti-reflective coating for damascene application
- Patent Title (中): 用于大马士革应用的低&K介电层,阻挡层,蚀刻停止和抗反射涂层的原位沉积
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Application No.: US12345431Application Date: 2008-12-29
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Publication No.: US07670945B2Publication Date: 2010-03-02
- Inventor: Judy H. Huang
- Applicant: Judy H. Huang
- Applicant Address: US CA Santa Clara
- Assignee: Applied Materials, Inc.
- Current Assignee: Applied Materials, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Patterson & Sheridan
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
The present invention provides a SiC material, formed according to certain process regimes, useful as a barrier layer, etch stop, and/or an ARC, in multiple levels, including the pre-metal dielectric (PMD) level, in IC applications and provides a dielectric layer deposited in situ with the SiC material for the barrier layers, and etch stops, and ARCs. The invention may also utilize a plasma containing a reducing agent, such as ammonia, to reduce any oxides that may occur, particularly on metal surfaces such as copper filled features. This particular SiC material is useful in complex structures, such as a damascene structure and is conducive to in situ deposition, especially when used in multiple capacities for the different layers, such as the barrier layer, the etch stop, and the ARC and can include in situ deposition of the associated dielectric layer(s).
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