Metal interconnect structure and process for forming same

Invention Grant

US07670947B2 Metal interconnect structure and process for forming same 失效

Title translation: 金属互连结构及其成型工艺

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Patent Title: Metal interconnect structure and process for forming same
Patent Title (中): 金属互连结构及其成型工艺
Application No.: US11652077

Application Date: 2007-01-11
Publication No.: US07670947B2

Publication Date: 2010-03-02
Inventor: Tsang-Jiuh Wu , Syun-Ming Jang , Ming-Chung Liang , Hsin-Yi Tsai
Applicant: Tsang-Jiuh Wu , Syun-Ming Jang , Ming-Chung Liang , Hsin-Yi Tsai
Applicant Address: TW Hsin-Chu
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
Current Assignee Address: TW Hsin-Chu
Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, LLP
Main IPC: H01L21/4763
IPC: H01L21/4763 ; H01L21/311

Metal interconnect structure and process for forming same

Abstract:

A process for forming an interconnect structure in a low-k dielectric layer includes etching to form trenches in the dielectric layer, removal of photoresist, and further etching to remove damaged portions of the dielectric layer in sidewalls of the trenches. An interconnect structure includes a low-k dielectric layer formed on a substrate, and a conductor embedded in the dielectric layer, the conductor having an edge portion with an inwardly rounded shape.

Abstract(Chinese):

用于在低k电介质层中形成互连结构的工艺包括蚀刻以在电介质层中形成沟槽，去除光致抗蚀剂，并进一步蚀刻以除去沟槽侧壁中介质层的损坏部分。互连结构包括形成在基板上的低k电介质层和嵌入电介质层中的导体，该导体具有向内圆形的边缘部分。

Public/Granted literature

US20080171442A1 Metal interconnect structure and process for forming same Public/Granted day:2008-07-17

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理
H01L21/04	..至少具有一个跃变势垒或表面势垒的器件，例如PN结、耗尽层、载体集结层
H01L21/34	...具有H01L21/06，H01L21/16及H01L21/18各组不包含的或有或无杂质，例如掺杂材料的半导体的器件
H01L21/46	....用H01L21/36至H01L21/428各组不包含的方法或设备处理半导体材料的（在半导体材料上制作电极的入H01L21/44）
H01L21/461	.....改变半导体材料的表面物理特性或形状的，例如腐蚀、抛光、切割
H01L21/4763	......非绝缘层的沉积，例如绝缘层上的导电层、电阻层；这些层的后处理（电极的制造入H01L21/28）