Invention Grant
- Patent Title: Plasma implantated impurities in junction region recesses
- Patent Title (中): 接合区凹陷中的等离子体植入杂质
-
Application No.: US11899250Application Date: 2007-09-04
-
Publication No.: US07671358B2Publication Date: 2010-03-02
- Inventor: Nick Lindert , Mitchell C. Taylor
- Applicant: Nick Lindert , Mitchell C. Taylor
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: H01L31/00
- IPC: H01L31/00

Abstract:
A transistor device having a conformal depth of impurities implanted by isotropic ion implantation into etched junction recesses. For example, a conformal depth of arsenic impurities and/or carbon impurities may be implanted by plasma immersion ion implantation in junction recesses to reduce boron diffusion and current leakage from boron doped junction region material deposited in the junction recesses. This may be accomplished by removing, such as by etching, portions of a substrate adjacent to a gate electrode to form junction recesses. The junction recesses may then be conformally implanted with a depth of arsenic and carbon impurities using plasma immersion ion implantation. After impurity implantation, boron doped silicon germanium can be formed in the junction recesses.
Public/Granted literature
- US20080001170A1 Plasma implantated impurities in junction region recesses Public/Granted day:2008-01-03
Information query
IPC分类: