Invention Grant
- Patent Title: Semiconductor integrated circuit device having improved punch-through resistance and production method thereof, semiconductor integrated circuit device including a low-voltage transistor and a high-voltage transistor
- Patent Title (中): 具有改进的穿通电阻的半导体集成电路器件及其制造方法，包括低压晶体管和高压晶体管的半导体集成电路器件
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Application No.: US11209881Application Date: 2005-08-24
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Publication No.: US07671384B2Publication Date: 2010-03-02
- Inventor: Taiji Ema , Hideyuki Kojima , Toru Anezaki
- Applicant: Taiji Ema , Hideyuki Kojima , Toru Anezaki
- Applicant Address: JP Tokyo
- Assignee: Fujitsu Microelectronics Limited
- Current Assignee: Fujitsu Microelectronics Limited
- Current Assignee Address: JP Tokyo
- Agency: Westerman, Hattori, Daniels & Adrian, LLP
- Main IPC: H01L23/62
- IPC: H01L23/62
Abstract:
An integrated circuit device comprises a memory cell well formed with a flash memory device, first and second well of opposite conductivity types for formation of high voltage transistors, and third and fourth wells of opposite conductivity types for low voltage transistors, wherein at least one of the first and second wells and at least one of the third and fourth wells have an impurity distribution profile steeper than the memory cell well.
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Information query
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