Invention Grant
US07671471B2 Method for making a semiconductor device having a high-k dielectric layer and a metal gate electrode
有权
制造具有高k电介质层和金属栅电极的半导体器件的方法
- Patent Title: Method for making a semiconductor device having a high-k dielectric layer and a metal gate electrode
- Patent Title (中): 制造具有高k电介质层和金属栅电极的半导体器件的方法
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Application No.: US12031409Application Date: 2008-02-14
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Publication No.: US07671471B2Publication Date: 2010-03-02
- Inventor: Justin K. Brask , Jack Kavalieros , Mark L. Doczy , Uday Shah , Chris E. Barns , Matthew V. Metz , Suman Datta , Annalisa Cappellani , Robert S. Chau
- Applicant: Justin K. Brask , Jack Kavalieros , Mark L. Doczy , Uday Shah , Chris E. Barns , Matthew V. Metz , Suman Datta , Annalisa Cappellani , Robert S. Chau
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: H01L21/48
- IPC: H01L21/48
Abstract:
A method for making a semiconductor device is described. That method comprises forming a first dielectric layer on a substrate, then forming a trench within the first dielectric layer. After forming a second dielectric layer on the substrate, a first metal layer is formed within the trench on a first part of the second dielectric layer. A second metal layer is then formed on the first metal layer and on a second part of the second dielectric layer.
Public/Granted literature
- US20080135952A1 METHOD FOR MAKING A SEMICONDUCTOR DEVICE HAVING A HIGH-K DIELECTRIC LAYER AND A METAL GATE ELECTRODE Public/Granted day:2008-06-12
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