Invention Grant
- Patent Title: Apparatus and method for generating multi-phase clocks
- Patent Title (中): 用于产生多相时钟的装置和方法
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Application No.: US12003681Application Date: 2007-12-31
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Publication No.: US07671649B2Publication Date: 2010-03-02
- Inventor: Kwang-Jin Na
- Applicant: Kwang-Jin Na
- Applicant Address: KR Gyeonggi-do
- Assignee: Hynix Semiconductor, Inc.
- Current Assignee: Hynix Semiconductor, Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Law Firm PLC
- Priority: KR10-2007-0111481 20071102
- Main IPC: H03L7/06
- IPC: H03L7/06

Abstract:
An apparatus for generating multi-phase clocks in accordance with the present invention includes a clock delay configured to delay a source clock by a delay time corresponding to a control signal to generate a plurality of clocks; a clock multiplexer configured to output a first clock for a first locking region and a second clock for a second locking region sequentially as a selected clock in response to a locking detection signal; a phase detector configured to detect a phase of the selected clock in comparison to a phase of the source clock to output a phase detection signal; and a control voltage signal generator configured to generate the control signal corresponding to the phase detection signal.
Public/Granted literature
- US20090115486A1 Apparatus and method for generating multi-phase clocks Public/Granted day:2009-05-07
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