Invention Grant
US07672150B2 Apparatus, embedded memory, address decoder, method of reading out data and method of configuring a memory 失效
装置,嵌入式存储器,地址解码器,读出数据的方法和配置存储器的方法

  • Patent Title: Apparatus, embedded memory, address decoder, method of reading out data and method of configuring a memory
  • Patent Title (中): 装置,嵌入式存储器,地址解码器,读出数据的方法和配置存储器的方法
  • Application No.: US11862212
    Application Date: 2007-09-27
  • Publication No.: US07672150B2
    Publication Date: 2010-03-02
  • Inventor: David A. Sellar
  • Applicant: David A. Sellar
  • Applicant Address: DE Neubiberg
  • Assignee: Infineon Technologies AG
  • Current Assignee: Infineon Technologies AG
  • Current Assignee Address: DE Neubiberg
  • Agency: SpryIP, LLC
  • Main IPC: G11C8/00
  • IPC: G11C8/00
Apparatus, embedded memory, address decoder, method of reading out data and method of configuring a memory
Abstract:
Embodiments of the invention relate generally to an apparatus, to an embedded memory, to an address decoder, to a method of reading out data and to a method of configuring a memory. In an embodiment of the invention an apparatus is provided. The apparatus may include a plurality of read-only memory (ROM) cells and an address decoder to access a ROM cell of the plurality of ROM cells, the address decoder further being fuse-programmable to divert an access to the ROM cell to a different memory cell.
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