Invention Grant
US07672173B2 Non-volatile semiconductor memory device and semiconductor memory device
有权
非易失性半导体存储器件和半导体存储器件
- Patent Title: Non-volatile semiconductor memory device and semiconductor memory device
- Patent Title (中): 非易失性半导体存储器件和半导体存储器件
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Application No.: US11902232Application Date: 2007-09-20
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Publication No.: US07672173B2Publication Date: 2010-03-02
- Inventor: Tsukasa Ooishi , Tomohiro Uchiyama , Shinya Miyazaki
- Applicant: Tsukasa Ooishi , Tomohiro Uchiyama , Shinya Miyazaki
- Applicant Address: JP Tokyo JP Tokyo
- Assignee: Renesas Technology Corp.,Hitachi ULSI Systems Co., Ltd.
- Current Assignee: Renesas Technology Corp.,Hitachi ULSI Systems Co., Ltd.
- Current Assignee Address: JP Tokyo JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JP2004-236069 20040813; JP2004-355793 20041208
- Main IPC: G11C7/00
- IPC: G11C7/00

Abstract:
For each memory block, a predecoder for predecoding an applied address signal, an address latch circuit for latching the output signal of the predecoder, and a decode circuit for decoding an output signal of the address latch circuit and performing a memory cell selecting operation in a corresponding memory block are provided. Propagation delay of latch predecode signals can be made smaller and the margin for the internal read timing can be enlarged. In addition, the internal state of the decoder and memory cell selection circuitry are reset to an initial state when a memory cell is selected and the internal data output circuitry is reset to an initial state in accordance with a state of internal data reading. Thus, a non-volatile semiconductor memory device that can decrease address skew and realize an operation with sufficient margin is provided.
Public/Granted literature
- US20080019195A1 Non-volatile semiconductor memory device and semiconductor memory device Public/Granted day:2008-01-24
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