Invention Grant
- Patent Title: Dynamic adaptive read return of DRAM data
- Patent Title (中): 动态自适应读取DRAM数据
-
Application No.: US11648855Application Date: 2006-12-29
-
Publication No.: US07672178B2Publication Date: 2010-03-02
- Inventor: Suryaprasad Kareenahalli , Zohar Bogin
- Applicant: Suryaprasad Kareenahalli , Zohar Bogin
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Lemoine Patent Services, PLLC
- Agent Dana B. Lemoine
- Main IPC: G11C7/00
- IPC: G11C7/00
Abstract:
An integrated circuit communicates with memory devices. Data from the memory devices arrives at the integrated circuit with varying propagation delays. The integrated circuit detects the arrival of data from the memory devices, and stores the data in FIFOs. A FIFO drain signal is generated responsive to the detection of the data arrival.
Public/Granted literature
- US20080159022A1 Dynamic adaptive read return of DRAM data Public/Granted day:2008-07-03
Information query
