Invention Grant
US07673095B2 FIFO memory architecture and method for the management of the same 有权
FIFO存储器架构和方法的管理相同

  • Patent Title: FIFO memory architecture and method for the management of the same
  • Patent Title (中): FIFO存储器架构和方法的管理相同
  • Application No.: US11016325
    Application Date: 2004-12-17
  • Publication No.: US07673095B2
    Publication Date: 2010-03-02
  • Inventor: Alain Artieri
  • Applicant: Alain Artieri
  • Applicant Address: FR Montrouge
  • Assignee: STMicroelectronics, SA
  • Current Assignee: STMicroelectronics, SA
  • Current Assignee Address: FR Montrouge
  • Agent Kevin D. Jablonski; Graybeal Jackson LLP
  • Priority: FR0314960 20031219
  • Main IPC: G06F13/00
  • IPC: G06F13/00
FIFO memory architecture and method for the management of the same
Abstract:
A FIFO memory with a frequency f and a size of M n-bit words, to successively store n-bit words received serially at an input and give said words serially at an output in the order in which they are stored, comprises a basic memory with a frequency f/2, capable of simultaneously storing two n-bit words successively received at the input of the FIFO memory. The memory also comprises a storage circuit to store either one n-bit word received at the input of the FIFO memory or simultaneously two n-bit words produced by the basic memory and to produce, at the output OUT of the FIFO memory, one of the words that said storage circuit stores.
Information query
Patent Agency Ranking
0/0