Invention Grant
- Patent Title: VLIW optional fetch packet header extends instruction set space
- Patent Title (中): VLIW可选的提取包头扩展指令集空间
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Application No.: US11382134Application Date: 2006-05-08
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Publication No.: US07673119B2Publication Date: 2010-03-02
- Inventor: Michael D. Asal , Eric J. Stotzer , Todd T. Hahn
- Applicant: Michael D. Asal , Eric J. Stotzer , Todd T. Hahn
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Robert D. Marshall, Jr.; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F15/76

Abstract:
This invention is useful in a very long instruction word data processor that fetches a predetermined plural number of instructions each operation cycle. A predetermined one of these instructions is used as a special header. This special header has a unique encoding different from any normal instruction. When decoded this special header instructs decode hardware to decode this fetch packet in a special way. In one embodiment a bit field in the header signals the decode hardware whether to decode each instruction word normally or in an alternative way. The header may include extension opcode bits corresponding to each of the other instruction slots. In another embodiment another bit field signals whether to decode an instruction field as one normal length instruction or as two half-length instructions.
Public/Granted literature
- US20060259739A1 Fetch Packet Header Extends Instruction Set Space Public/Granted day:2006-11-16
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