Invention Grant
US07673216B2 Cache memory device, semiconductor integrated circuit, and cache control method
有权
缓存存储器件，半导体集成电路和高速缓存控制方法
- Patent Title: Cache memory device, semiconductor integrated circuit, and cache control method
- Patent Title (中): 缓存存储器件，半导体集成电路和高速缓存控制方法
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Application No.: US11295562Application Date: 2005-12-07
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Publication No.: US07673216B2Publication Date: 2010-03-02
- Inventor: Mitsuaki Hino , Akira Nodomi
- Applicant: Mitsuaki Hino , Akira Nodomi
- Applicant Address: JP Tokyo
- Assignee: Fujitsu Microelectronics Limited
- Current Assignee: Fujitsu Microelectronics Limited
- Current Assignee Address: JP Tokyo
- Agency: Fujitsu Patent Center
- Priority: JP2005-226764 20050804
- Main IPC: H03M13/00
- IPC: H03M13/00
Abstract:
A memory cache device in which a storage area used for a memory data protection function is effectively used at the time of not using the memory data protection function. A mode selection signal makes ECC code sections for storing an ECC code function as a storage area for storing ECC codes used for performing error detection or error correction on data stored in data RAMs at the time the memory data protection function is enabled and as a way added to the data RAMs at the time the memory data protection function is disabled.
Public/Granted literature
- US20070044004A1 Cache memory device, semiconductor integrated circuit, and cache control method Public/Granted day:2007-02-22
Information query
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