Invention Grant
US07674637B2 Monitoring cool-down stress in a flip chip process using monitor solder bump structures 失效
在使用监测焊料凸点结构的倒装芯片工艺中监控冷却应力

Monitoring cool-down stress in a flip chip process using monitor solder bump structures
Abstract:
A semiconductor chip and methods for forming the same. The semiconductor chip includes M regular solder bump structures and N monitor solder bump structures, M and N being positive integers. If a flip chip process is performed for the semiconductor chip, then the N monitor solder bump structures are more sensitive to a cool-down stress than the M regular solder bump structures. The cool-down stress results from a cool-down step of the flip chip process. Each of the M regular solder bump structures is electrically connected to either a power supply or a device of the semiconductor chip. Each of the N monitor solder bump structures is not electrically connected to a power supply or a device of the semiconductor chip.
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