Invention Grant
- Patent Title: Fabricating process for substrate with embedded passive component
- Patent Title (中): 具有嵌入式无源元件的基板的制造工艺
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Application No.: US12358852Application Date: 2009-01-23
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Publication No.: US07674672B2Publication Date: 2010-03-09
- Inventor: Shih-Lian Cheng
- Applicant: Shih-Lian Cheng
- Applicant Address: TW Hsinchu
- Assignee: Sabtron Technology Co., Ltd.
- Current Assignee: Sabtron Technology Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: J.C. Patents
- Priority: TW97116997A 20080508
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L21/8244 ; H01L21/20 ; H01L21/44

Abstract:
A fabricating process for a substrate with an embedded passive component is provided. The fabricating process includes the following steps. First, a substrate including a top conductive layer, a bottom conductive layer, and at least a dielectric layer is provided. The top conductive layer and the bottom conductive layer are separately disposed on a top surface and a bottom surface of the dielectric layer. Next, a plurality of plating through holes is formed in the substrate. Then, the top and the bottom conductive layers are patterned to form a patterned top conductive layer and a patterned bottom conductive layer separately, and the dielectric layer is exposed in part. The patterned top conductive layer and the patterned bottom conductive layer have many traces and many trenches formed by the traces. Thereafter, the trenches are filled with a material, wherein the traces and the material are adapted for forming the passive component.
Public/Granted literature
- US20090280617A1 FABRICATING PROCESS FOR SUBSTRATE WITH EMBEDDED PASSIVE COMPONENT Public/Granted day:2009-11-12
Information query
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