Invention Grant
US07674694B2 Process for manufacturing a TFT device with source and drain regions having gradual dopant profile
有权
用于制造具有逐渐掺杂剂分布的源区和漏区的TFT器件的工艺
- Patent Title: Process for manufacturing a TFT device with source and drain regions having gradual dopant profile
- Patent Title (中): 用于制造具有逐渐掺杂剂分布的源区和漏区的TFT器件的工艺
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Application No.: US12031456Application Date: 2008-02-14
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Publication No.: US07674694B2Publication Date: 2010-03-09
- Inventor: Salvatore Leonardi , Salvatore Coffa , Claudia Caligiore , Guglielmo Fortunato , Luigi Mariucci , Massimo Cuscuna
- Applicant: Salvatore Leonardi , Salvatore Coffa , Claudia Caligiore , Guglielmo Fortunato , Luigi Mariucci , Massimo Cuscuna
- Applicant Address: IT Agrate Brianza
- Assignee: STMicroelectronics S.r.l.
- Current Assignee: STMicroelectronics S.r.l.
- Current Assignee Address: IT Agrate Brianza
- Agency: Seed IP Law Group PLLC
- Agent Lisa K. Jorgenson; Robert Iannucci
- Priority: ITMI2007A0271 20070214
- Main IPC: H01L21/20
- IPC: H01L21/20 ; H01L21/36

Abstract:
A process for realizing TFT devices on a substrate comprises the steps of: forming on the substrate, in cascade, an amorphous silicon layer and a heavily doped amorphous silicon layer, forming a photolithographic mask on the heavily doped amorphous silicon layer provided with an opening, removing the heavily doped amorphous silicon layer through the opening for realizing opposite portions of the heavily doped amorphous silicon layer whose cross dimensions decrease as long as they depart from the amorphous silicon layer, removing the photolithographic mask, carrying out a diffusion and activation step of the dopant contained in the portions of the heavily doped amorphous silicon layer inside the amorphous silicon layer, for realizing source/drain regions of said TFT device.
Public/Granted literature
- US20080213961A1 PROCESS FOR MANUFACTURING A TFT DEVICE WITH SOURCE AND DRAIN REGIONS HAVING GRADUAL DOPANT PROFILE Public/Granted day:2008-09-04
Information query
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