A spin transistor comprises a semiconductor substrate part having a lower cladding layer, a channel layer and an upper cladding layer sequentially stacked therein, a ferromagnetic source and drain on the substrate part, and a gate on the substrate part to control spins of electrons passing through the channel layer. The lower cladding layer comprises a first lower cladding layer and a second lower cladding layer having a higher band gap than that of the first lower cladding layer. The upper cladding layer comprises a first upper cladding layer and a second upper cladding layer having a higher band gap than that of the first upper cladding layer. The source and the drain are buried in an upper surface of the substrate part and extend downwardly to or under the first upper cladding layer.