Invention Grant
- Patent Title: Memory array structure with strapping cells
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Application No.: US11361248Application Date: 2006-02-24
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Publication No.: US07675124B2Publication Date: 2010-03-09
- Inventor: Jhon-Jhy Liaw
- Applicant: Jhon-Jhy Liaw
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L27/108
- IPC: H01L27/108 ; H01L27/11 ; H01L27/112

Abstract:
A memory array with a row of strapping cells is provided. In accordance with embodiments of the present invention, strapping cells are positioned between two rows of a memory array. The strapping cells provide a P+ strap between N+ active areas of two memory cells in a column and provide an N+ strap between P+ active areas of two memory cells in a column of the memory array. The strapping cells provide an insulating structure between the two rows of the memory array and create a more uniform operation of the memory cells regardless of the positions of the memory cells within the memory array. In an embodiment, a dummy N-well may be formed along the outer edge of the memory array in a direction perpendicular to the row of strapping cells. Furthermore, transistors may be formed in the strapping cells to provide additional insulation between the strapped memory cells.
Public/Granted literature
- US20070200182A1 Memory array structure with strapping cells Public/Granted day:2007-08-30
Information query
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