Invention Grant
- Patent Title: Base substrate for chip scale packaging
- Patent Title (中): 用于芯片级封装的基底
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Application No.: US11868092Application Date: 2007-10-05
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Publication No.: US07675159B2Publication Date: 2010-03-09
- Inventor: Jeff Biar , Chih-Kung Huang
- Applicant: Jeff Biar , Chih-Kung Huang
- Agency: Browdy & Neimark, PLLC
- Priority: TW96204286U 20070316
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
A base substrate for chip scale package includes a carrier member made of electrical conductive metals with a first through opening; an active member laminated by a base layer made of electrical conductive metal and an intermediate layer made of electrical insulating or dielectric material, the active member having a through opening with a diameter larger that the diameter of the through opening of the base metal member; the active member being coupled with the carrier member in such a way that the intermediate layer is adhered to an upper surface of the carrier member, and these through openings are aligned to define a shoulder around the through opening of the base metal plate.
Public/Granted literature
- US20080224299A1 BASE SUBSTRATE FOR CHIP SCALE PACKAGING Public/Granted day:2008-09-18
Information query
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