Invention Grant
US07675340B2 Multiphase clock generator circuit 有权
多相时钟发生电路

Multiphase clock generator circuit
Abstract:
A multiphase clock generator circuit for generating a plurality of output clock pulses that differ in phase on the basis of a reference clock pulse, has first and second divider circuits for dividing first and second reference clock pulses that differ in phase to generate output clock pulses, and a switch for forming an intermittent short between predetermined nodes of the first and second divider circuits, wherein the switch forms a short between the predetermined nodes with timing in which the predetermined nodes are brought to the same level in a normal operating state.
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