Invention Grant
- Patent Title: Protection circuit for power management semiconductor devices and power converter having the protection circuit
- Patent Title (中): 具有保护电路的电源管理半导体器件和电力转换器保护电路
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Application No.: US11979874Application Date: 2007-11-09
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Publication No.: US07675727B2Publication Date: 2010-03-09
- Inventor: Masataka Sasaki , Katsumi Ishikawa , Ryuichi Saito , Koichi Suda , Katsuaki Takahashi
- Applicant: Masataka Sasaki , Katsumi Ishikawa , Ryuichi Saito , Koichi Suda , Katsuaki Takahashi
- Applicant Address: JP Tokyo
- Assignee: Hitachi, Ltd.
- Current Assignee: Hitachi, Ltd.
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JP2003-169715 20030613
- Main IPC: H02H3/08
- IPC: H02H3/08 ; H02H9/02

Abstract:
A collector voltage of a power management semiconductor device is detected by a first comparator, and when the detected collector voltage exceeds a first reference voltage, the first comparator outputs a first detection signal. Furthermore, a gate voltage of the power management semiconductor device is detected by a second comparator, and when the detected gate voltage exceeds a second reference voltage, the second comparator outputs a second detection signal. The second reference voltage is a minimum gate voltage for feeding a rated power to the power management semiconductor device or over, and less than a line power voltage of a drive circuit of the power management semiconductor device. When both the first detection signal and second detection signal are being outputted, the gate voltage is reduced by a gate voltage reduction means so as to protect the power management semiconductor device from overcurrent and overvoltage.
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