Invention Grant
US07676286B2 Fail-silent node architecture 失效
故障静默节点架构

Fail-silent node architecture
Abstract:
A system including a node, wherein the node includes two separate controllers, each of which is configured to output data to a bus, or receive data from a bus, or output data to and receive data from a bus. At least one controller is configured to monitor the output of the other controller and is configured such that if the at least one controller determines that the other controller is providing improper data or signals, at least part of the output data of the other controller is nullified, overridden or superseded by an output from the at least one controller.
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