Invention Grant
- Patent Title: Enhanced floating-point unit for extended functions
- Patent Title (中): 用于扩展功能的增强型浮点单元
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Application No.: US11236984Application Date: 2005-09-28
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Publication No.: US07676535B2Publication Date: 2010-03-09
- Inventor: David D. Donofrio , Xuye Li
- Applicant: David D. Donofrio , Xuye Li
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: G06F7/38
- IPC: G06F7/38

Abstract:
An embodiment of the present invention is a technique to perform floating-point operations. A floating-point (FP) squarer squares a first argument to produce an intermediate argument. The first and intermediate arguments have first and intermediate mantissas and exponents. A FP multiply-add (MAD) unit performs a multiply-and-add operation on the intermediate argument, a second argument, and a third argument to produce a result having a result mantissa and a result exponent. The second and third arguments have second and third mantissas and exponents, respectively.
Public/Granted literature
- US20070073798A1 Enhanced floating-point unit for extended functions Public/Granted day:2007-03-29
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