Invention Grant
US07676636B2 Method and apparatus for implementing virtual transactional memory using cache line marking
有权
使用高速缓存行标记来实现虚拟事务存储器的方法和装置
- Patent Title: Method and apparatus for implementing virtual transactional memory using cache line marking
- Patent Title (中): 使用高速缓存行标记来实现虚拟事务存储器的方法和装置
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Application No.: US11775693Application Date: 2007-07-10
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Publication No.: US07676636B2Publication Date: 2010-03-09
- Inventor: Robert E. Cypher , Shailender Chaudhry , Anders Landin
- Applicant: Robert E. Cypher , Shailender Chaudhry , Anders Landin
- Applicant Address: US CA Santa Clara
- Assignee: Sun Microsystems, Inc.
- Current Assignee: Sun Microsystems, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Park, Vaughan & Fleming LLP
- Agent Anthony P. Jones
- Main IPC: G06F12/08
- IPC: G06F12/08

Abstract:
Embodiments of the present invention implement virtual transactional memory using cache line marking. The system starts by executing a starvation-avoiding transaction for a thread. While executing the starvation-avoiding transaction, the system places starvation-avoiding load-marks on cache lines which are loaded from and places starvation-avoiding store-marks on cache lines which are stored to. Next, while swapping a page out of a memory and to a disk during the starvation-avoiding transaction, the system determines if one or more cache lines in the page have a starvation-avoiding load-mark or a starvation-avoiding store-mark. If so, upon swapping the page into the memory from the disk, the system places a starvation-avoiding load-mark on each cache line that had a starvation-avoiding load-mark and places a starvation-avoiding store-mark on each cache line that had a starvation-avoiding store-mark.
Public/Granted literature
- US20090019231A1 Method and Apparatus for Implementing Virtual Transactional Memory Using Cache Line Marking Public/Granted day:2009-01-15
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