Invention Grant
- Patent Title: Integrated circuit with continuous testing of repetitive functional blocks
- Patent Title (中): 具有连续测试重复功能块的集成电路
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Application No.: US11755448Application Date: 2007-05-30
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Publication No.: US07676715B2Publication Date: 2010-03-09
- Inventor: Gary L. Miller , Hugo Mauro V D C Cavalcanti
- Applicant: Gary L. Miller , Hugo Mauro V D C Cavalcanti
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent Gary R. Stanford
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G11C29/00
Abstract:
A method of continuous testing of repetitive functional blocks provided on an integrated circuit (IC) which includes selecting one of the repetitive functional blocks at a time for testing, substituting a test repetitive functional block for a selected repetitive functional block, and testing the selected repetitive functional block during normal functional mode of the IC. An IC which includes repetitive functional blocks for performing corresponding functional block operations during normal functional mode of the IC, and a test system which performs continuous testing of each repetitive functional block while the functional block operations are performed during normal functional mode of the IC. One block may be tested during normal operation for each IC reset event without transferring or copying state information. Multiple blocks may be tested one at a time during normal operation by transferring state information between a selected block and a test block.
Public/Granted literature
- US20080301511A1 INTEGRATED CIRCUIT WITH CONTINUOUS TESTING OF REPETITIVE FUNCTIONAL BLOCKS Public/Granted day:2008-12-04
Information query
