Invention Grant
- Patent Title: Methods of fabricating semiconductor devices including channel layers having improved defect density and surface roughness characteristics
- Patent Title (中): 制造半导体器件的方法包括具有改进的缺陷密度和表面粗糙度特性的沟道层
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Application No.: US11962742Application Date: 2007-12-21
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Publication No.: US07678625B2Publication Date: 2010-03-16
- Inventor: Jong-Heun Lim , Chang-Ki Hong , Bo-Un Yoon , Seong-Kyu Yun , Suk-Hun Choi , Sang-Yeob Han
- Applicant: Jong-Heun Lim , Chang-Ki Hong , Bo-Un Yoon , Seong-Kyu Yun , Suk-Hun Choi , Sang-Yeob Han
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel Sibley & Sajovec, P.A.
- Priority: KR10-2006-0134399 20061227
- Main IPC: H01L21/84
- IPC: H01L21/84

Abstract:
A method of fabricating a semiconductor device including a channel layer includes forming a single crystalline semiconductor layer on a semiconductor substrate. The single crystalline semiconductor layer includes a protrusion extending from a surface thereof. A first polishing process is performed on the single crystalline semiconductor layer to remove a portion of the protrusion such that the single crystalline semiconductor layer includes a remaining portion of the protrusion. A second polishing process different from the first polishing process is performed to remove the remaining portion of the protrusion and define a substantially planar single crystalline semiconductor layer having a substantially uniform thickness. A sacrificial layer may be formed on the single crystalline semiconductor layer and used as a polish stop for the first polishing process to define a sacrificial layer pattern, which may be removed prior to the second polishing process. Related methods of fabricating stacked semiconductor memory devices are also discussed.
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