Semiconductor device and manufacturing method of the same

Invention Grant

US07678646B2 Semiconductor device and manufacturing method of the same 有权

Title translation: 半导体器件及其制造方法相同

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Patent Title: Semiconductor device and manufacturing method of the same
Patent Title (中): 半导体器件及其制造方法相同
Application No.: US11326187

Application Date: 2006-01-06
Publication No.: US07678646B2

Publication Date: 2010-03-16
Inventor: Akio Itoh , Naoya Sashida
Applicant: Akio Itoh , Naoya Sashida
Applicant Address: JP Yokohama
Assignee: Fujitsu Microelectronics Limited
Current Assignee: Fujitsu Microelectronics Limited
Current Assignee Address: JP Yokohama
Agency: Westerman, Hattori, Daniels & Adrian, LLP
Priority: JP2005-221010 20050729
Main IPC: H01L21/8242
IPC: H01L21/8242 ; H01L21/8238

Semiconductor device and manufacturing method of the same

Abstract:

To provide a semiconductor device capable of improving accuracy in finishing a hole in which a conductive plug right under a capacitor, and a manufacturing method of such a semiconductor device comprising the following steps: a step of forming first and second conductive plugs 32a, 32b in first and second holes 11a, 11b in a first insulating film 11; a step of forming a first opening 14a in an oxidation preventing insulating film 14; a step of forming an auxiliary conductive plug 36a in the first opening 14a; a step of forming a capacitor Q on the auxiliary conductive plug 36a; a step of forming third and fourth holes 41a, 41b in a second insulating film 41 covering the capacitor Q; a step of forming the second opening 14b in the oxidation preventing insulating film 14 under the fourth hole 41b; a step of forming a third conductive plug 47a in the third hole 41a; and a step of forming a fourth conductive plug 47b in the third hole 41a.

Abstract(Chinese):

为了提供能够提高电容器正下方的导电插塞的精加工精度的半导体装置以及这种半导体装置的制造方法，包括以下步骤：将第一和第二导电塞32a，32b形成在第第一绝缘膜11中的第一和第二孔11a，11b; 在防氧化绝缘膜14中形成第一开口14a的步骤; 在第一开口14a中形成辅助导电塞36a的步骤; 在辅助导电插塞36a上形成电容器Q的步骤; 在覆盖电容器Q的第二绝缘膜41中形成第三和第四孔41a，41b的步骤; 在第四孔41b的下面的防氧化绝缘膜14中形成第二开口14b的步骤; 在第三孔41a中形成第三导电塞47a的步骤; 以及在第三孔41a中形成第四导电插塞47b的步骤。

Public/Granted literature

US20070032015A1 Semiconductor device and manufacturing method of the same Public/Granted day:2007-02-08

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8239	........存储器结构
H01L21/8242	.........动态随机存取存储结构（DRAM）