Invention Grant
- Patent Title: Method of fabricating an enhanced resurf HVPMOS device
- Patent Title (中): 制造增强型复合HVPMOS器件的方法
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Application No.: US11669233Application Date: 2007-01-31
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Publication No.: US07678656B2Publication Date: 2010-03-16
- Inventor: Jun Cai , Michael Harley-Stead , Jim G. Holt
- Applicant: Jun Cai , Michael Harley-Stead , Jim G. Holt
- Applicant Address: US ME South Portland
- Assignee: Fairchild Semiconductor Corporation
- Current Assignee: Fairchild Semiconductor Corporation
- Current Assignee Address: US ME South Portland
- Agency: Hiscock & Barclay, LLP
- Agent Thomas R. FitzGerald, Esq.
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
An HV PMOS device formed on a substrate having an HV well of a first polarity type formed in an epitaxial layer of a second polarity type includes a pair of field oxide regions on the substrate and at least partially over the HV well. Insulated gates are formed on the substrate between the field oxide regions. Stacked hetero-doping rims are formed in the HV well and in self-alignment with outer edges of the gates. A buffer region of the first polarity type is formed in the HV well between and in self-alignment with inner edges of the gates. A drift region of the second polarity type is formed in the buffer region between and in self-alignment with inner edges of the gates. The drift region includes a region having a gradual dopant concentration change, and includes a drain region of the second polarity type.
Public/Granted literature
- US20070120184A1 ENHANCED RESURF HVPMOS DEVICE WITH STACKED HETERO-DOPING RIM AND GRADUAL DRIFT REGION Public/Granted day:2007-05-31
Information query
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