Invention Grant
US07678670B2 TEG removing method in manufacturing method for semiconductor chips
有权
用于半导体芯片的制造方法中的TEG去除方法
- Patent Title: TEG removing method in manufacturing method for semiconductor chips
- Patent Title (中): 用于半导体芯片的制造方法中的TEG去除方法
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Application No.: US11660996Application Date: 2005-12-21
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Publication No.: US07678670B2Publication Date: 2010-03-16
- Inventor: Kiyoshi Arita , Akira Nakagawa
- Applicant: Kiyoshi Arita , Akira Nakagawa
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: Wenderoth, Lind & Ponack L.L.P.
- Priority: JP2004-373022 20041224
- International Application: PCT/JP2005/023991 WO 20051221
- International Announcement: WO2006/068284 WO 20060629
- Main IPC: H01L21/301
- IPC: H01L21/301

Abstract:
A semiconductor chip manufacturing process includes sticking a protective sheet onto a first surface of a semiconductor wafer so that the sheet comes in contact with the TEG, placing a mask on a second surface that is a surface opposite from the first surface, performing plasma etching on the second surface to remove portions corresponding to dividing regions and separate device-formation-regions into individual semiconductor chips, and removing the TEG in a state where it remains unremoved in the dividing regions and stuck to the protective sheet together with the protective sheet by peeling off the protective sheet.
Public/Granted literature
- US20070264832A1 Manufacturing Method For Semiconductor Chips Public/Granted day:2007-11-15
Information query
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