Invention Grant
- Patent Title: Semiconductor integrated circuit
- Patent Title (中): 半导体集成电路
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Application No.: US12115103Application Date: 2008-05-05
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Publication No.: US07679106B2Publication Date: 2010-03-16
- Inventor: Mototsugu Hamada
- Applicant: Mototsugu Hamada
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2007-129537 20070515
- Main IPC: H01L27/118
- IPC: H01L27/118

Abstract:
A semiconductor integrated circuit having a substantially rectangular standard cell divided by first borderlines opposed to other standard cells longitudinally adjacent to the standard cell and second borderlines opposed to other standard cells laterally adjacent to the standard cell, the standard cell has: a p-type MOS transistor having first diffused regions and a first gate electrode; an n-type MOS transistor having second diffused regions and a second gate electrode with STI disposed for device isolation between the n-type MOS transistor and the p-type MOS transistor substantially in parallel with the first borderlines; dummy p-type MOS transistors having third gate electrodes disposed on the second borderlines so as to be adjacent to the first diffused regions of the p-type MOS transistor, the third gate electrodes being connected to power supply wiring so as to turn off the dummy p-type MOS transistors; and dummy n-type MOS transistors having fourth gate electrodes disposed on the second borderlines so as to be adjacent to the second diffused regions of the n-type MOS transistor, the fourth gate electrodes being connected to ground wiring so as to turn off the dummy n-type MOS transistors.
Public/Granted literature
- US20080283871A1 SEMICONDUCTOR INTEGRATED CIRCUIT Public/Granted day:2008-11-20
Information query
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