A circuit is used for preventing a computer from being powered up before a CPU voltage of the computer is prepared properly. The circuit includes a power supply for providing power to the computer, a power button for powering on the computer system, a power controller, and a switch. The power controller includes an input terminal connected to the power button and an output terminal for electrical connection to the power supply. The input terminal receives a PWRBT# signal when the power button is momentarily triggered, and the output terminal outputs a PSON# signal to the power supply to control the power supply to provide the electrical power to the computer in response to the received PWRBT# signal. The switch is serially connected between the output terminal and the power supply. The switch includes a control terminal monitoring if the CPU voltage is prepared properly so as to control conduction of the switch and further to control connection between the output terminal and the power supply.