Invention Grant
- Patent Title: Voltage level shifter and buffer using same
- Patent Title (中): 电压电平转换器和缓冲器使用相同
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Application No.: US11741383Application Date: 2007-04-27
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Publication No.: US07679418B2Publication Date: 2010-03-16
- Inventor: Peter A. Vlasenko
- Applicant: Peter A. Vlasenko
- Applicant Address: CA Ottawa, Ontario
- Assignee: MOSAID Technologies Incorporated
- Current Assignee: MOSAID Technologies Incorporated
- Current Assignee Address: CA Ottawa, Ontario
- Agency: Ridout & Maybee LLP
- Main IPC: H03L5/00
- IPC: H03L5/00

Abstract:
A voltage level shifter with an input transistor pair, a cross-coupled load chain transistor pair and a pair of current sources, effects reduced power consumption through the use of the cross-coupled load chain transistor pair to minimize the DC current component present in known voltage level shifters. In specific embodiments, feedback elements may be used to minimize delays in signal transitions. A reference voltage that corresponds to a current capability of the input transistor pair may be used to regulate the current sources in the load chain. Changes in a swing of the input signal voltage received by the input transistor pair may be reflected in corresponding changes to the reference voltage. The voltage level shifter may be of particular use in a buffer.
Public/Granted literature
- US20080265970A1 VOLTAGE LEVEL SHIFTER AND BUFFER USING SAME Public/Granted day:2008-10-30
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