Invention Grant
- Patent Title: Semiconductor device including a bias voltage generator
- Patent Title (中): 包括偏置电压发生器的半导体器件
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Application No.: US11818388Application Date: 2007-06-14
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Publication No.: US07679427B2Publication Date: 2010-03-16
- Inventor: Douglas Kerns
- Applicant: Douglas Kerns
- Applicant Address: US CA Los Gatos
- Assignee: SuVolta, Inc.
- Current Assignee: SuVolta, Inc.
- Current Assignee Address: US CA Los Gatos
- Agent Darryl G. Walker
- Main IPC: H01L31/112
- IPC: H01L31/112 ; H01L29/80 ; H03K17/687 ; G05F3/02

Abstract:
A semiconductor device including a bias voltage generator formed from a junction field effect transistor (JFET). The JFET includes a control gate terminal and a first and a second source/drain terminal. The first and second source/drain terminals can form a first terminal of a p-n junction and the control gate terminal can form a second terminal of the p-n junction. The first terminal of the p-n junction can be provided with a first potential. The second terminal can be left essentially floating to provide a bias voltage. A bias receiving circuit can receive the bias voltage. The bias receiving circuit can be in close proximity on the semiconductor device to the bias voltage generator.
Public/Granted literature
- US20080309397A1 Semiconductor device including a bias voltage generator Public/Granted day:2008-12-18
Information query
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