Invention Grant
US07679453B2 Phase-locked loop capable of dynamically adjusting phase of output signal according to detection result of phase/frequency detector, and method thereof 有权
能够根据相位/频率检测器的检测结果动态调整输出信号的相位的锁相环及其方法

  • Patent Title: Phase-locked loop capable of dynamically adjusting phase of output signal according to detection result of phase/frequency detector, and method thereof
  • Patent Title (中): 能够根据相位/频率检测器的检测结果动态调整输出信号的相位的锁相环及其方法
  • Application No.: US11940301
    Application Date: 2007-11-14
  • Publication No.: US07679453B2
    Publication Date: 2010-03-16
  • Inventor: Shaw-N Min
  • Applicant: Shaw-N Min
  • Applicant Address: TW Hsinchu
  • Assignee: Realtek Semiconductor Corp.
  • Current Assignee: Realtek Semiconductor Corp.
  • Current Assignee Address: TW Hsinchu
  • Agency: Thomas, Kayden, Horstemeyer & Risley
  • Priority: TW95142269A 20061115
  • Main IPC: H03L7/085
  • IPC: H03L7/085
Phase-locked loop capable of dynamically adjusting phase of output signal according to detection result of phase/frequency detector, and method thereof
Abstract:
A phase-locked method includes: generating a selection signal according to a detection result of a phase/frequency detector (PFD) of a phase-locked loop (PLL); generating a plurality of oscillation signals according to at least a first oscillation signal generated by the PLL, wherein the plurality of oscillation signals respectively correspond to a plurality of phases; and from the plurality of oscillation signals, selecting an oscillation signal as an output signal of the PLL according to the selection signal.
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