Invention Grant
US07682888B2 Methods of forming NMOS/PMOS transistors with source/drains including strained materials
有权
用包括应变材料在内的源极/漏极形成NMOS / PMOS晶体管的方法
- Patent Title: Methods of forming NMOS/PMOS transistors with source/drains including strained materials
- Patent Title (中): 用包括应变材料在内的源极/漏极形成NMOS / PMOS晶体管的方法
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Application No.: US11435968Application Date: 2006-05-17
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Publication No.: US07682888B2Publication Date: 2010-03-23
- Inventor: Ho Lee , Tetsuji Ueno , Hwa-Sung Rhe
- Applicant: Ho Lee , Tetsuji Ueno , Hwa-Sung Rhe
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Myers Bigel Sibley & Sajovec, P.A.
- Priority: KR10-2005-0077916 20050824
- Main IPC: H01L21/4763
- IPC: H01L21/4763

Abstract:
A method of forming an integrated circuit includes selectively forming active channel regions for NMOS and PMOS transistors on a substrate parallel to a crystal orientation thereof and selectively forming source/drain regions of the NMOS transistors with Carbon (C) impurities therein.
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