Invention Grant
US07682980B2 Method to improve profile control and N/P loading in dual doped gate applications
有权
在双掺杂栅极应用中改进轮廓控制和N / P加载的方法
- Patent Title: Method to improve profile control and N/P loading in dual doped gate applications
- Patent Title (中): 在双掺杂栅极应用中改进轮廓控制和N / P加载的方法
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Application No.: US11627016Application Date: 2007-01-25
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Publication No.: US07682980B2Publication Date: 2010-03-23
- Inventor: Helene Del Puppo , Frank Lin , Chris Lee , Vahid Vahedi , Thomas A. Kamp , Alan J. Miller , Saurabh Ullal , Harmeet Singh
- Applicant: Helene Del Puppo , Frank Lin , Chris Lee , Vahid Vahedi , Thomas A. Kamp , Alan J. Miller , Saurabh Ullal , Harmeet Singh
- Applicant Address: US CA Fremont
- Assignee: Lam Research Corporation
- Current Assignee: Lam Research Corporation
- Current Assignee Address: US CA Fremont
- Agency: Martine Penilla & Gencarella, LLP
- Main IPC: H01L21/302
- IPC: H01L21/302
Abstract:
A method for etching a polysilicon gate structure in a plasma etch chamber is provided. The method initiates with defining a pattern protecting a polysilicon film to be etched. Then, a plasma is generated. Next, substantially all of the polysilicon film that is unprotected is etched. Then, a silicon containing gas is introduced and a remainder of the polysilicon film is etched while introducing a silicon containing gas. An etch chamber configured to introduce a silicon containing gas during an etch process is also provided.
Public/Granted literature
- US20070117399A1 METHOD TO IMPROVE PROFILE CONTROL AND N/P LOADING IN DUAL DOPED GATE APPLICATIONS Public/Granted day:2007-05-24
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