Invention Grant
- Patent Title: Formation of a silicon oxide interface layer during silicon carbide etch stop deposition to promote better dielectric stack adhesion
- Patent Title (中): 在碳化硅蚀刻停止沉积期间形成氧化硅界面层以促进更好的介电堆叠粘附
-
Application No.: US11750669Application Date: 2007-05-18
-
Publication No.: US07682989B2Publication Date: 2010-03-23
- Inventor: Laura M. Matz , Ting Y. Tsui , Thad E. Briggs , Robert Kraft
- Applicant: Laura M. Matz , Ting Y. Tsui , Thad E. Briggs , Robert Kraft
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H01L21/31
- IPC: H01L21/31 ; H01L21/469

Abstract:
In accordance with the present teachings, semiconductor devices and methods of making semiconductor devices and dielectric stack in an integrated circuit are provided. The method of forming a dielectric stack in an integrated circuit can include providing a semiconductor structure including one or more copper interconnects and forming an etch stop layer over the semiconductor structure in a first processing chamber. The method can also include forming a thin silicon oxide layer over the etch stop layer in the first processing chamber and forming an ultra low-k dielectric layer over the thin silicon oxide layer in a second processing chamber, wherein forming the thin silicon oxide layer improves adhesion between the etch stop layer and the ultra low-k dielectric as compared to a dielectric stack that is devoid of the thin silicon oxide layer between the etch stop layer and the ultra low-k dielectric.
Public/Granted literature
Information query
IPC分类: